naibrd_ar.h

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typedef enum naibrd_ar_parity
{
   NAIBRD_AR_PAR_ODD  = 0u,      /* odd parity */
   NAIBRD_AR_PAR_NONE = 1u       /* parity as data; no parity */
} naibrd_ar_parity_t;
typedef enum naibrd_ar_tstamp
{
   NAIBRD_AR_TSTAMP_1US   = 0x00000000,   /* 1 us resolution */
   NAIBRD_AR_TSTAMP_10US  = 0x00000001,   /* 10 us resolution */
   NAIBRD_AR_TSTAMP_100US = 0x00000002,   /* 100 us resolution */
   NAIBRD_AR_TSTAMP_1MS   = 0x00000003    /* 1 ms resolution */
} naibrd_ar_tstamp_t;
typedef enum naibrd_ar_rx_mode
{
   NAIBRD_AR_RX_FIFO_MODE  = 0u,       /* FIFO Rx Mode */
   NAIBRD_AR_RX_MBOX_MODE  = 1u        /* Mailbox Rx Mode */
} naibrd_ar_rx_mode_t;
typedef enum naibrd_ar_tx_mode
{
   NAIBRD_AR_TX_SENDMODE_IMMED = 0u,   /* Immediate Tx Mode */
   NAIBRD_AR_TX_SENDMODE_SCHED = 1u,   /* Scheduled Tx Mode */
   NAIBRD_AR_TX_SENDMODE_TRGF  = 2u    /* Triggered Tx Mode */
} naibrd_ar_tx_mode_t;
typedef enum naibrd_ar_datarate
{
   NAIBRD_AR_SPEED_LOW =  0u,    /* 100 kHz */
   NAIBRD_AR_SPEED_HIGH = 1u     /* 12.5-14.5 kHz */
} naibrd_ar_datarate_t;
typedef enum naibrd_ar_status_access_type
{
   NAIBRD_AR_STATUS_LATCHED  = 0u,        /* Latched Status (event-triggered status is set until cleared) */
   NAIBRD_AR_STATUS_REALTIME = 1u         /* Real-time (Dynamic) Status */
} naibrd_ar_status_access_type_t;
typedef enum naibrd_ar_sched_cmd
{
   NAIBRD_AR_TX_SCHED_STOP             = 0x0,
   NAIBRD_AR_TX_SCHED_MESSAGE          = 0x1,
   NAIBRD_AR_TX_SCHED_GAP              = 0x2,
   NAIBRD_AR_TX_SCHED_FIXEDGAP         = 0x3,
   NAIBRD_AR_TX_SCHED_PAUSE            = 0x4,
   NAIBRD_AR_TX_SCHED_INTERRUPT        = 0x5,
   NAIBRD_AR_TX_SCHED_JUMP             = 0x6
} naibrd_ar_sched_cmd_t;
typedef enum naibrd_ar_chan_mapped_status_type
{
   NAIBRD_AR_STATUS_BIT_LATCHED,
   NAIBRD_AR_STATUS_BIT_REALTIME,
   NAIBRD_AR_STATUS_SUMMARY_RX_AVAIL_LATCHED,
   NAIBRD_AR_STATUS_SUMMARY_RX_AVAIL_REALTIME
} naibrd_ar_chan_mapped_status_type_t;
typedef enum naibrd_ar_event_mapped_status_type
{
   NAIBRD_AR_EVENT_STATUS_GENERAL_RX_DATA_AVAIL_REALTIME = 0,
   NAIBRD_AR_EVENT_STATUS_GENERAL_RX_DATA_AVAIL_LATCHED = 1,
   NAIBRD_AR_EVENT_STATUS_GENERAL_RX_FIFO_ALM_FULL_REALTIME = 2,
   NAIBRD_AR_EVENT_STATUS_GENERAL_RX_FIFO_ALM_FULL_LATCHED = 3,
   NAIBRD_AR_EVENT_STATUS_GENERAL_RX_FIFO_FULL_REALTIME = 4,
   NAIBRD_AR_EVENT_STATUS_GENERAL_RX_FIFO_FULL_LATCHED = 5,
   NAIBRD_AR_EVENT_STATUS_GENERAL_RX_FIFO_OVERFLOW_REALTIME = 6,
   NAIBRD_AR_EVENT_STATUS_GENERAL_RX_FIFO_OVERFLOW_LATCHED = 7,
   NAIBRD_AR_EVENT_STATUS_GENERAL_TX_FIFO_EMPTY_REALTIME = 8,
   NAIBRD_AR_EVENT_STATUS_GENERAL_TX_FIFO_EMPTY_LATCHED = 9,
   NAIBRD_AR_EVENT_STATUS_GENERAL_TX_FIFO_ALM_EMPTY_REALTIME = 10,
   NAIBRD_AR_EVENT_STATUS_GENERAL_TX_FIFO_ALM_EMPTY_LATCHED = 11,
   NAIBRD_AR_EVENT_STATUS_GENERAL_TX_FIFO_FULL_REALTIME = 12,
   NAIBRD_AR_EVENT_STATUS_GENERAL_TX_FIFO_FULL_LATCHED = 13,
   NAIBRD_AR_EVENT_STATUS_GENERAL_PARITY_ERROR_REALTIME = 14,
   NAIBRD_AR_EVENT_STATUS_GENERAL_PARITY_ERROR_LATCHED = 15,
   NAIBRD_AR_EVENT_STATUS_GENERAL_RX_ERROR_REALTIME = 16,
   NAIBRD_AR_EVENT_STATUS_GENERAL_RX_ERROR_LATCHED = 17,
   NAIBRD_AR_EVENT_STATUS_GENERAL_BIT_ERROR_REALTIME = 18,
   NAIBRD_AR_EVENT_STATUS_GENERAL_BIT_ERROR_LATCHED = 19,
   NAIBRD_AR_EVENT_STATUS_GENERAL_SCHED_INTERRUPT_REALTIME = 20,
   NAIBRD_AR_EVENT_STATUS_GENERAL_SCHED_INTERRUPT_LATCHED = 21,
   NAIBRD_AR_EVENT_STATUS_GENERAL_ASYNC_DATA_AVAIL_REALTIME = 22,
   NAIBRD_AR_EVENT_STATUS_GENERAL_ASYNC_DATA_AVAIL_LATCHED = 23,
   NAIBRD_AR_EVENT_STATUS_GENERAL_TX_COMPLETE_REALTIME = 24,
   NAIBRD_AR_EVENT_STATUS_GENERAL_TX_COMPLETE_LATCHED = 25,
   NAIBRD_AR_EVENT_STATUS_GENERAL_TX_RUN_REALTIME = 26,
   NAIBRD_AR_EVENT_STATUS_GENERAL_TX_RUN_LATCHED = 27,
   NAIBRD_AR_EVENT_STATUS_GENERAL_TX_PAUSE_REALTIME = 28,
   NAIBRD_AR_EVENT_STATUS_GENERAL_TX_PAUSE_LATCHED = 29
} naibrd_ar_event_mapped_status_type_t;
typedef enum naibrd_ar_event_mapped_category_type
{
   NAIBRD_AR_EVENT_MAP_GENERAL
} naibrd_ar_event_mapped_category_type_t;
typedef enum naibrd_ar568_tx_mode
{
   NAIBRD_AR568_TX_SENDMODE_IMMED = 0u,   /* Immediate Tx Mode */
   NAIBRD_AR568_TX_SENDMODE_TRGF  = 1u    /* Triggered Tx Mode */
} naibrd_ar568_tx_mode_t;
typedef enum naibrd_ar568_chan_mapped_status_type
{
   NAIBRD_AR568_STATUS_BIT_LATCHED,
   NAIBRD_AR568_STATUS_BIT_REALTIME
} naibrd_ar568_chan_mapped_status_type_t;
typedef enum naibrd_ar568_event_mapped_status_type
{
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_DATA_AVAIL_REALTIME = 0,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_DATA_AVAIL_LATCHED = 1,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FIFO_EMPTY_REALTIME = 2,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FIFO_EMPTY_LATCHED = 3,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FIFO_ALM_EMPTY_REALTIME = 4,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FIFO_ALM_EMPTY_LATCHED = 5,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FIFO_ALM_FULL_REALTIME = 6,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FIFO_ALM_FULL_LATCHED = 7,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FIFO_FULL_REALTIME = 8,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FIFO_FULL_LATCHED = 9,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FIFO_READ_ERROR_REALTIME = 10,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FIFO_READ_ERROR_LATCHED = 11,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FIFO_OVERFLOW_REALTIME = 12,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FIFO_OVERFLOW_LATCHED = 13,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FRAME_ERROR_REALTIME = 14,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_RX_FRAME_ERROR_LATCHED = 15,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_TX_BUSY_REALTIME = 16,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_TX_BUSY_LATCHED = 17,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_TX_FIFO_EMPTY_REALTIME = 18,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_TX_FIFO_EMPTY_LATCHED = 19,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_TX_FIFO_ALM_EMPTY_REALTIME = 20,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_TX_FIFO_ALM_EMPTY_LATCHED = 21,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_TX_FIFO_ALM_FULL_REALTIME = 22,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_TX_FIFO_ALM_FULL_LATCHED = 23,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_TX_FIFO_FULL_REALTIME = 24,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_TX_FIFO_FULL_LATCHED = 25,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_TX_FIFO_OVERFLOW_REALTIME = 26,
   NAIBRD_AR568_EVENT_STATUS_GENERAL_TX_FIFO_OVERFLOW_LATCHED = 27
} naibrd_ar568_event_mapped_status_type_t;
typedef enum naibrd_ar568_event_mapped_category_type
{
   NAIBRD_AR568_EVENT_MAP_GENERAL
} naibrd_ar568_event_mapped_category_type_t;
typedef enum naibrd_ar579_tx_mode
{
   NAIBRD_AR579_TX_SENDMODE_IMMED = 0u,   /* Immediate Tx Mode */
   NAIBRD_AR579_TX_SENDMODE_TRGF  = 2u    /* Triggered Tx Mode */
} naibrd_ar579_tx_mode_t;
typedef enum naibrd_ar579_slope_control
{
   NAIBRD_AR579_RISE_FALL_TIME_10_US = 0u,      /* rise/fall time 10 us */
   NAIBRD_AR579_RISE_FALL_TIME_1_5_US = 1u      /* rise/fall time 1.5 us */
} naibrd_ar579_slope_control_t;
typedef enum naibrd_ar579_chan_mapped_status_type
{
   NAIBRD_AR579_STATUS_BIT_LATCHED,
   NAIBRD_AR579_STATUS_BIT_REALTIME
} naibrd_ar579_chan_mapped_status_type_t;
typedef enum naibrd_ar579_event_mapped_status_type
{
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_DATA_AVAIL_REALTIME = 0,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_DATA_AVAIL_LATCHED = 1,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_FIFO_EMPTY_REALTIME = 2,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_FIFO_EMPTY_LATCHED = 3,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_FIFO_ALM_EMPTY_REALTIME = 4,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_FIFO_ALM_EMPTY_LATCHED = 5,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_FIFO_ALM_FULL_REALTIME = 6,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_FIFO_ALM_FULL_LATCHED = 7,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_FIFO_FULL_REALTIME = 8,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_FIFO_FULL_LATCHED = 9,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_FIFO_READ_ERROR_REALTIME = 10,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_FIFO_READ_ERROR_LATCHED = 11,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_FIFO_OVERFLOW_REALTIME = 12,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_FIFO_OVERFLOW_LATCHED = 13,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_PARITY_ERROR_REALTIME = 14,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_RX_PARITY_ERROR_LATCHED = 15,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_TX_BUSY_REALTIME = 16,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_TX_BUSY_LATCHED = 17,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_TX_FIFO_EMPTY_REALTIME = 18,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_TX_FIFO_EMPTY_LATCHED = 19,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_TX_FIFO_ALM_EMPTY_REALTIME = 20,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_TX_FIFO_ALM_EMPTY_LATCHED = 21,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_TX_FIFO_ALM_FULL_REALTIME = 22,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_TX_FIFO_ALM_FULL_LATCHED = 23,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_TX_FIFO_FULL_REALTIME = 24,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_TX_FIFO_FULL_LATCHED = 25,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_TX_FIFO_OVERFLOW_REALTIME = 26,
   NAIBRD_AR579_EVENT_STATUS_GENERAL_TX_FIFO_OVERFLOW_LATCHED = 27
} naibrd_ar579_event_mapped_status_type_t;
typedef enum naibrd_ar579_event_mapped_category_type
{
   NAIBRD_AR579_EVENT_MAP_GENERAL
} naibrd_ar579_event_mapped_category_type_t;