Functions
static nai_status_t	naibrd_TTL_VerifyChannel (uint32_t modid, int32_t channel)

static nai_status_t	naibrd_TTL_VerifyBank (uint32_t modid, int32_t bank)

static nai_status_t	naibrd_TTL_VerifyStatusType (naibrd_ttl_status_type_t type)

static nai_status_t	naibrd_TTL_VerifyResetType (naibrd_ttl_reset_type_t type)

static nai_status_t	naibrd_TTL_VerifyIOFormat (naibrd_ttl_ioformat_t format)

static nai_status_t	naibrd_TTL_VerifyState (naibrd_ttl_state_t state)

static nai_status_t	naibrd_TTL_VerifyBankVCCSource (naibrd_ttl_vcc_t vcc)

static nai_status_t	naibrd_TTL_VerifyInterruptTriggerType (naibrd_int_trigger_type_t triggerType)

static nai_status_t	naibrd_TTL_VerifyInterruptSteeringType (naibrd_int_steering_t steeringType)

static nai_status_t	naibrd_TTL_VerifyEnableType (naibrd_ttl_enable_type_t enableType)

static nai_status_t	naibrd_TTL_VerifyEnhancedMode (uint32_t modId, naibrd_ttl_enhanced_mode_t mode)

static nai_status_t	naibrd_TTL_VerifyFIFOEventMappedStatus (naibrd_ttl_event_mapped_status_type_t statusType)

static nai_status_t	naibrd_TTL_VerifyEventMapCategoryType (naibrd_ttl_event_mapped_category_type_t categoryType)

static nai_status_t	naibrd_TTL_VerifyAccesType (nai_status_access_type_t accessType)

static nai_status_t	naibrd_TTL_VerifyBurstNum (int32_t burstnum)

static nai_status_t	naibrd_TTL_VerifyDataPattern (int32_t dataPatternLen, const uint32_t *dataPattern)

static nai_status_t	naibrd_TTL_VerifyPatGenAdrress (uint32_t startAddr)

static nai_status_t	naibrd_TTL_VerifyPatGenCtrl (naibrd_ttl_pattern_ctrl_t controlBit)

static nai_status_t	naibrd_TTL_VerifyPWMPolarity (naibrd_ttl_pwm_polarity_t polarity)

NAIBRDFUNC int32_t NAIAPI	naibrd_TTL_GetChannelCount (uint32_t modid)
	Returns the number of channels for the specified TTL Module ID.

NAIBRDFUNC int32_t NAIAPI	naibrd_TTL_GetVCCBankCount (uint32_t modid)
	Returns the number of VCC channel banks for the specified TTL Module ID.

NAIBRDFUNC int32_t NAIAPI	naibrd_TTL_GetVCCBankSize (uint32_t modid)
	Returns the number of channels in each VCC bank for the specified TTL Module ID.

NAIBRDFUNC float64_t NAIAPI	naibrd_TTL_GetTimebaseLSB (uint32_t modid)
	Returns the LSB for the timer interval for Debounce, Measurement, PWM and Pattern Generator clocks for the specified TTL Module ID.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetInputState (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_state_t *p_inputstate)
	Retrieves the Input State for the specified TTL channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetBankVCCReading (int32_t cardIndex, int32_t module, int32_t bank, float64_t *p_outvoltage)
	Retrieves the Vcc voltage reading for the specified TTL bank, reading is returned in volts. This feature is only supported on X2 TTL modules and up.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetChanMappedStatus (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_status_type_t type, nai_status_bit_t *p_outstatusbit)
	Retrieves the realtime or continuous status for the specified TTL channel and status type. Realtime status always represents the present status at the time of the read, as opposed to the latched status, which retains transient indications until cleared.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_ClearChanMappedStatus (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_status_type_t type)
	Clears the latched status for the specified TTL channel and status type.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetChanStatusEnable (int32_t cardIndex, int32_t module, int32_t channel, bool_t enable)
	Enables/disables status reporting for the specified TTL channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetChanStatusEnable (int32_t cardIndex, int32_t module, int32_t channel, bool_t *p_outenable)
	Retrieves the enabled/disabled state of status reporting for the specified TTL channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetIOFormat (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_ioformat_t format)
	Sets the Input/Output configuration for the specified TTL channel. Default configuration for the channels is input.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetIOFormat (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_ioformat_t *p_outformat)
	Retrieves the Input/Output configuration for the specified TTL channel. Default configuration for the channels is input.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetOutputState (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_state_t state)
	Sets the Output State for the specified TTL channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetOutputState (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_state_t *p_outstate)
	Retrieves the Output State for the specified TTL channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetBankVCCSource (int32_t cardIndex, int32_t module, int32_t bank, naibrd_ttl_vcc_t source)
	Sets the Vcc source to internal or external for the specified TTL bank. Power on default is internal Vcc.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetBankVCCSource (int32_t cardIndex, int32_t module, int32_t bank, naibrd_ttl_vcc_t *p_outsource)
	Retrieves the Vcc source to internal or external for the specified TTL bank. Power on default is internal Vcc.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_Reset (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_reset_type_t resetType)
	Resets the TTL channel as specified by the reset type.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_ResetAll (int32_t cardIndex, int32_t module, naibrd_ttl_reset_type_t resetType)
	Resets all channels on the module as specified by the reset type.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetDebounceTime (int32_t cardIndex, int32_t module, int32_t channel, float64_t debounceTime_mS)
	Sets the debounce time for the specified channel. Enter time in milliseconds. When a signal level is within a valid logic range and maintains that level for a period longer than the debounce time, the logic transition is validated. Signal pulse widths less than debounce time are filtered or ignored. Once valid, the transition status is set and the output logic changes state. Enter a value of 0 to disable debounce filtering. Debounce defaults to 0 upon power on or reset.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetDebounceTime (int32_t cardIndex, int32_t module, int32_t channel, float64_t *p_outdebounceTime_mS)
	Retrieves the debounce time for the specified TTL channel, in units of milliseconds. When a signal level is within a valid logic range and maintains that level for a period longer than the debounce time, the logic transition is validated. Signal pulse widths less than debounce time are filtered or ignored. Once valid, the transition status is set and the output logic changes state. A value of 0 disables debounce filtering. Debounce defaults to 0 upon power on or reset.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetDebounceLSB (int32_t cardIndex, int32_t module, float64_t debounceLSBtime_mS)
	Sets the debounce LSB time value (applies to all the channels on the module). This debounce LSB time value coupled with the value in the individual channel debounce time registers will determine the effective debounce time for each channel. Feature presently available only on the D7 TTL module; LSB is fixed on other modules.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetDebounceLSB (int32_t cardIndex, int32_t module, float64_t *p_outdebounceLSBtime_mS)
	Retrieves the debounce LSB time value, applicable for all channels on the module. This value, multiplied by the value set in the individual channel debounce time register determines the effective debounce time for each channel. For the D7 module, this LSB unit is user configurable. Debounce LSB is fixed in other modules.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_CheckPowerOnBITComplete (int32_t cardIndex, int32_t module, bool_t *p_outpbitComplete)
	Retrieves the Power-On BIT (PBIT) status (complete or incomplete) for the specified module. The PBIT result will be in the BIT status register.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetModuleBITErrorThreshold (int32_t cardIndex, int32_t module, uint32_t threshold)
	Sets the BIT Error Threshold for continuous BIT conditions. The Error Threshold is a scalar for the internal BIT +2/-1 counter. To filter our momentary or intermittent anomalies in background BIT errors, this value can be increased to allow the error the "come and go" before the BIT status is flagged.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetModuleBITErrorThreshold (int32_t cardIndex, int32_t module, uint32_t *p_outthreshold)
	Retrieves the BIT Error Threshold for continuous BIT conditions. The Error Threshold is a scalar for the internal BIT +2/-1 counter. To filter our momentary or intermittent anomalies in background BIT errors, this value can be increased to allow the error the "come and go" before the BIT status is flagged.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_ClearModuleBITLogic (int32_t cardIndex, int32_t module, int32_t channel)
	Resets the Continuous BIT internal circuitry and counter mechanism for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetModulePowerResetStatus (int32_t cardIndex, int32_t module, naibrd_ttl_module_power_reset_status_type_t modulePowerResetStatusType, bool_t *p_outmodulePowerResetStatusBit)
	Retrieves the bit specified by the module power reset status type from the module power reset status register for the specified TTL module.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_ClearModulePowerResetStatus (int32_t cardIndex, int32_t module, naibrd_ttl_module_power_reset_status_type_t modulePowerResetStatusType)
	Clears the bit specified by the module power reset status type in the module power reset status register for the specified TTL module.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetModulePowerReset (int32_t cardIndex, int32_t module, naibrd_ttl_module_power_reset_type_t modulePowerResetType, bool_t modulePowerResetBit)
	Sets the bit specified by the module power reset type in the module power reset register for the specified TTL module. If the bit was set, the hardware will acknowledge it by setting the corresponding bit back to 0.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetModulePowerReset (int32_t cardIndex, int32_t module, naibrd_ttl_module_power_reset_type_t modulePowerResetType, bool_t *p_outmodulePowerResetBit)
	Retrieves the bit specified by the module power reset type from the module power reset register for the specified TTL module.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetWatchdogQuietTime (int32_t cardIndex, int32_t module, uint32_t quietTime)
	Sets the quiet time duration for the watchdog timer. The watchdog timer is comprised of two parts: quiet time, and window. The quiet time is the time where a strobe is NOT expected to occur, and the window is the time where a SINGLE strobe is expected. A strobe is made by the application by calling naibrd_TTL_WatchdogStrobe().

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetWatchdogQuietTime (int32_t cardIndex, int32_t module, uint32_t *p_outquietTime)
	Sets the quiet time duration for the watchdog timer. The watchdog timer is comprised of two parts: quiet time, and window. The quiet time is the time where a strobe is NOT expected to occur, and the window is the time where a SINGLE strobe is expected. A strobe is made by the application by calling naibrd_TTL_WatchdogStrobe().

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetWatchdogWindow (int32_t cardIndex, int32_t module, uint32_t window)
	Sets the window that a call to naibrd_TTL_WatchdogStrobe() will be made. If a call to naibrd_TTL_WatchdogStrobe() is not made by the application within the 'window' ('quiet time' + 'window'), the Watchdog Timer Fault will occur.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetWatchdogWindow (int32_t cardIndex, int32_t module, uint32_t *p_outwindow)
	Retrieves the window that a call to naibrd_TTL_WatchdogStrobe() will be made. If a call to naibrd_TTL_WatchdogStrobe() is not made by the application within the 'window' ('quiet time' + 'window'), the Watchdog Timer Fault will occur.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_WatchdogStrobe (int32_t cardIndex, int32_t module)
	Strobes the Watchdog Timer. A SINGLE call to this function MUST be made by the application within the 'window' or a Watchdog Timer Fault will occur.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_WatchdogReset (int32_t cardIndex, int32_t module)
	Resets the Watchdog Timer. A reset will stop the Watchdog process and no faults will occur. The process starts again upon the first strobe.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetChanMappedInterruptEnable (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_status_type_t statusType, bool_t enable)
	Sets the Interrupt Enable for the specified channel and interrupt status type.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetChanMappedInterruptEnable (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_status_type_t statusType, bool_t *p_outenable)
	Retrieves the Interrupt Enable for the specified channel and interrupt status type.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetChanMappedInterruptTriggerType (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_status_type_t statusType, naibrd_int_trigger_type_t triggerType)
	Sets the Interrupt Edge/Level property for the specified channel and interrupt status type.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetChanMappedInterruptTriggerType (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_status_type_t statusType, naibrd_int_trigger_type_t *p_outtriggerType)
	Retrieves the Interrupt Edge/Level property for the specified channel and interrupt status type.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetChanMappedInterruptVector (int32_t cardIndex, int32_t module, naibrd_ttl_status_type_t statusType, uint32_t vector)
	Sets the Interrupt Vector for the specified channel and interrupt status type.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetChanMappedInterruptVector (int32_t cardIndex, int32_t module, naibrd_ttl_status_type_t statusType, uint32_t *p_outVector)
	Retrieves the Interrupt Vector for the specified channel and interrupt status type.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetChanMappedInterruptSteering (int32_t cardIndex, int32_t module, naibrd_ttl_status_type_t statusType, naibrd_int_steering_t steering)
	Sets the Interrupt Steering which indicates the interrupt direction for the specified interrupt status type.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetChanMappedInterruptSteering (int32_t cardIndex, int32_t module, naibrd_ttl_status_type_t statusType, naibrd_int_steering_t *p_outSteering)
	Retrieves the Interrupt Steering which indicates the interrupt direction for the specified interrupt status type.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetEnhanceTriggerEnable (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_enable_type_t enable)
	Sets enhanced operation to disabled or enabled for specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetEnhanceTriggerEnable (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_enable_type_t *p_outenable)
	Retrieves the present enhance operation enable state for the specified channel. Power on default configuration for the channels is Enhanced Input.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetEnhancedMode (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_enhanced_mode_t mode)
	Sets the Enhanced mode for the specified channel. Default configuration for the channels is Enhanced Input.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetEnhancedMode (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_enhanced_mode_t *p_outmode)
	Retrieves the Operation mode in Enhanced mode for the specified channel. Default configuration for the channels is Enhanced Input.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetFIFOEventMappedStatus (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_event_mapped_status_type_t statusType, nai_status_bit_t *p_outstatusBit)
	Retrieves the channel's FIFO Buffer Status.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetFIFOEventMappedStatusRaw (int32_t cardIndex, int32_t module, int32_t channel, nai_status_access_type_t accessType, naibrd_ttl_event_mapped_category_type_t categoryType, uint32_t *p_outstatusRaw)
	Retrieves the channel's FIFO Buffer Status value.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_ClearFIFO (int32_t cardIndex, int32_t module, int32_t channel)
	Clears the FIFO Data for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetFIFOCount (int32_t cardIndex, int32_t module, int32_t channel, int32_t *p_outcount)
	Retrieves the number of elements in FIFO for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_ReadFIFO (int32_t cardIndex, int32_t module, int32_t channel, int32_t count, int32_t timeout, uint32_t outdata[], int32_t p_outcount, int32_t p_outcountRemaining)
	Retrieves the data elements from the channel's FIFO buffer.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetTimebaseInterval (int32_t cardIndex, int32_t module, int32_t channel, float64_t interval)
	Sets the timebase for frequency measurements for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetTimebaseInterval (int32_t cardIndex, int32_t module, int32_t channel, float64_t *p_outinterval)
	Retrieves the timebase for frequency measurements for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_ClearCountData (int32_t cardIndex, int32_t module, int32_t channel)
	Clears the measurement count data for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetCountData (int32_t cardIndex, int32_t module, int32_t channel, int32_t *p_outcount)
	Retrieves the measurement count data for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_EnablePatternGen (int32_t cardIndex, int32_t module, int32_t channel, bool_t enable)
	Starts or stops the RAM Pattern Generator.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetPatternGenPeriod (int32_t cardIndex, int32_t module, float64_t period_mS)
	Sets the period for the Pattern Generator for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetPatternGenPeriod (int32_t cardIndex, int32_t module, float64_t *p_outperiod_mS)
	Retrieves the period for the Pattern Generator for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetPatternGen_BurstNum (int32_t cardIndex, int32_t module, int32_t burstNum)
	Sets the number of cycles to output in the PatternGen burst mode for the specified module. The set value is applicable for enhanced IO PatternGen burst mode.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetPatternGen_BurstNum (int32_t cardIndex, int32_t module, int32_t *p_outburstNum)
	Retrieves the number of cycles set to output in the PatternGen burst mode for the specified module.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetPatternGenBuf (int32_t cardIndex, int32_t module, int32_t dataPatternLen, const uint32_t *dataPattern)
	Sets the pattern for RAM Pattern Generator.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetPatternGenBuf (int32_t cardIndex, int32_t module, int32_t dataPatternLen, uint32_t *p_outdataPattern)
	Retrieves the pattern for RAM Pattern Generator.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetPatternGenStartAddr (int32_t cardIndex, int32_t module, uint32_t startAddr)
	Sets the starting address to look at for RAM Pattern Generator.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetPatternGenStartAddr (int32_t cardIndex, int32_t module, uint32_t *p_outstartAddr)
	Gets the starting address to look at for RAM Pattern Generator.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetPatternGenEndAddr (int32_t cardIndex, int32_t module, uint32_t EndAddr)
	Sets the Ending address to look at for RAM Pattern Generator.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetPatternGenEndAddr (int32_t cardIndex, int32_t module, uint32_t *p_outEndAddr)
	Gets the Ending address to look at for RAM Pattern Generator.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetPatternGenCtrl (int32_t cardIndex, int32_t module, naibrd_ttl_pattern_ctrl_t controlBit, naibrd_ttl_enable_type_t state)
	Sets the state for the RAM Pattern Generator for the selected control bit on the module. Options are enable and disable.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetPatternGenCtrl (int32_t cardIndex, int32_t module, naibrd_ttl_pattern_ctrl_t controlBit, naibrd_ttl_enable_type_t *p_outstate)
	Gets the state for the RAM Pattern Generator for the selected control bit on the module. Options are enable and disable.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetPatternGenCtrlRaw (int32_t cardIndex, int32_t module, uint32_t controlRaw)
	Sets the control bits for RAM Pattern Generator.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetPatternGenCtrlRaw (int32_t cardIndex, int32_t module, uint32_t *p_outcontrolRaw)
	Retrieves the control bits for RAM Pattern Generator.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetPWM_Period (int32_t cardIndex, int32_t module, int32_t channel, float64_t period)
	Sets the PWM period for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetPWM_Period (int32_t cardIndex, int32_t module, int32_t channel, float64_t *p_outperiod)
	Retrieves the PWM period value set for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetPWM_Pulsewidth (int32_t cardIndex, int32_t module, int32_t channel, float64_t pulsewidth)
	Sets the PWM pulsewidth for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetPWM_Pulsewidth (int32_t cardIndex, int32_t module, int32_t channel, float64_t *p_outpulsewidth)
	Retrieves the PWM pulsewidth value set for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetPWM_BurstNum (int32_t cardIndex, int32_t module, int32_t channel, int32_t burstNum)
	Sets the number of cycles to output in the PWM burst mode for the specified channel. The set value is applicable for enhanced IO PWM burst mode (mode 12).

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetPWM_BurstNum (int32_t cardIndex, int32_t module, int32_t channel, int32_t *p_outburstNum)
	Retrieves the number of cycles set to output in the PWM burst mode for the specified channel.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_SetPWM_Polarity (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_pwm_polarity_t polarity)
	Sets the polarity for the PWM output for the selected channel on the module. Options are positive and negative polarity, where positive indicates the high state corresponds to the pulsewidth setting, and negative inverts it for a negative going pulse output.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_GetPWM_Polarity (int32_t cardIndex, int32_t module, int32_t channel, naibrd_ttl_pwm_polarity_t *p_outpolarity)
	Retrieves the polarity setting for the PWM output for the selected channel on the module. Options are positive and negative polarity, where positive setting indicates the high state corresponds to the pulsewidth setting, and negative setting inverts it for a negative going pulse output.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_StartPWM (int32_t cardIndex, int32_t module, int32_t channel)
	Starts the PWM output for the selected channel on the module. For GEN5 module, PWM mode should be set up first, to the desired mode (continuous or burst). The PWM mode setup will need to be done before each start command.

NAIBRDFUNC nai_status_t NAIAPI	naibrd_TTL_StopPWM (int32_t cardIndex, int32_t module, int32_t channel)
	Stops the PWM output for the selected channel on the module. For Gen5 modules, this is done by taking the channel out of PWM mode and resetting to the input mode. To restart PWM, the PWM mode setting will need to be independently set up again.

Variables
static const uint32_t	TTL_GEN3_DebounceTimeRegAddr [] = NAI_TTL_GEN3_REG_DEBOUNCE_TIME_ADD

static const uint32_t	TTL_GEN3_IOFormatRegAddr [2] = NAI_TTL_GEN3_REG_INPUT_OUTPUT_FORMAT_ADD

static const uint32_t	TTL_GEN3_StatusRegAddr [NAIBRD_TTL_STATUS_TYPE_ENUM_COUNT]

static const uint32_t	TTL_GEN5_VCCReadingRegAddr [4] = NAI_TTL_GEN5_REG_VCC_RDG_ADD

static const uint32_t	TTL_GEN5_DebounceTimeRegAddr [] = NAI_TTL_GEN5_REG_DEBOUNCE_TIME_ADD

static const uint32_t	TTL_GEN5_LegacyModeSelectAddr [] = NAI_TTL_LEGACY_REG_MODE_SELECT_ADD

static const uint32_t	TTL_GEN5_StatusRegAddr [NAIBRD_TTL_STATUS_TYPE_ENUM_COUNT]

static const uint32_t	TTL_GEN5_int_enable [NAIBRD_TTL_STATUS_TYPE_ENUM_COUNT]

static const uint32_t	ttl_24_reg_int_type [NAIBRD_TTL_STATUS_TYPE_ENUM_COUNT]

static const int32_t	ttl_24_interrupt_num [NAIBRD_TTL_STATUS_TYPE_ENUM_COUNT]

static const uint32_t	TTL_GEN5_EnhancedModeSelectAddr [24] = NAI_TTL_GEN5_REG_MODE_SELECT_ADD

static const uint32_t	TTL_GEN5_EnhancedModeMappedVal [] = NAI_TTL_GEN5_MODE_MAPPED_VALUE

static const uint32_t	TTL_GEN5_FIFO_StatusRegAddr [24] = NAI_TTL_GEN5_REG_FIFO_STATUS_ADD

static const uint32_t	TTL_GEN5_FIFO_ResetRegAddr [1] = { NAI_TTL_GEN5_REG_RESET_FIFO_ADD }

static const uint32_t	TTL_GEN5_FIFO_CountRegAddr [24] = NAI_TTL_GEN5_REG_COUNT_ADD

static const uint32_t	TTL_GEN5_FIFO_DataRegAddr [24] = NAI_TTL_GEN5_REG_FIFO_DATA_ADD

static const uint32_t	TTL_GEN5_TimebaseIntervalRegAddr [24] = NAI_TTL_GEN5_REG_TIMEBASE_INTERVAL_ADD

static const uint32_t	TTL_GEN5_CountDataResetRegAddr [1] = { NAI_TTL_GEN5_REG_RESET_TIMER_ADD }

static const uint32_t	TTL_GEN5_CountDataRegAddr [24] = NAI_TTL_GEN5_REG_COUNT_DATA_ADD

static const uint32_t	TTL_GEN5_PWM_PeriodRegAddr [24] = NAI_TTL_GEN5_REG_PWM_PERIOD_ADD

static const uint32_t	TTL_GEN5_PWM_PulseWidthRegAddr [24] = NAI_TTL_GEN5_REG_PWM_PULSEWIDTH_ADD

static const uint32_t	TTL_GEN5_PWM_BurstCountRegAddr [24] = NAI_TTL_GEN5_REG_PWM_BURST_COUNT_ADD

static const uint32_t	TTL_GEN5_PWMPolarityRegAddr [1] = { NAI_TTL_GEN5_PWM_POLARITY_SELECT_ADD }

Function Documentation

◆ naibrd_TTL_VerifyAccesType()

static nai_status_t naibrd_TTL_VerifyAccesType ( nai_status_access_type_t accessType )

static

◆ naibrd_TTL_VerifyBank()

static nai_status_t naibrd_TTL_VerifyBank	(	uint32_t	modid,
		int32_t	bank )

static

◆ naibrd_TTL_VerifyBankVCCSource()

static nai_status_t naibrd_TTL_VerifyBankVCCSource ( naibrd_ttl_vcc_t vcc )

static

◆ naibrd_TTL_VerifyBurstNum()

static nai_status_t naibrd_TTL_VerifyBurstNum ( int32_t burstnum )

static

◆ naibrd_TTL_VerifyChannel()

static nai_status_t naibrd_TTL_VerifyChannel	(	uint32_t	modid,
		int32_t	channel )

static

◆ naibrd_TTL_VerifyDataPattern()

static nai_status_t naibrd_TTL_VerifyDataPattern	(	int32_t	dataPatternLen,
		const uint32_t *	dataPattern )

static

◆ naibrd_TTL_VerifyEnableType()

static nai_status_t naibrd_TTL_VerifyEnableType ( naibrd_ttl_enable_type_t enableType )

static

◆ naibrd_TTL_VerifyEnhancedMode()

static nai_status_t naibrd_TTL_VerifyEnhancedMode	(	uint32_t	modId,
		naibrd_ttl_enhanced_mode_t	mode )

static

◆ naibrd_TTL_VerifyEventMapCategoryType()

static nai_status_t naibrd_TTL_VerifyEventMapCategoryType ( naibrd_ttl_event_mapped_category_type_t categoryType )

static

◆ naibrd_TTL_VerifyFIFOEventMappedStatus()

static nai_status_t naibrd_TTL_VerifyFIFOEventMappedStatus ( naibrd_ttl_event_mapped_status_type_t statusType )

static

◆ naibrd_TTL_VerifyInterruptSteeringType()

static nai_status_t naibrd_TTL_VerifyInterruptSteeringType ( naibrd_int_steering_t steeringType )

static

◆ naibrd_TTL_VerifyInterruptTriggerType()

static nai_status_t naibrd_TTL_VerifyInterruptTriggerType ( naibrd_int_trigger_type_t triggerType )

static

◆ naibrd_TTL_VerifyIOFormat()

static nai_status_t naibrd_TTL_VerifyIOFormat ( naibrd_ttl_ioformat_t format )

static

◆ naibrd_TTL_VerifyPatGenAdrress()

static nai_status_t naibrd_TTL_VerifyPatGenAdrress ( uint32_t startAddr )

static

◆ naibrd_TTL_VerifyPatGenCtrl()

static nai_status_t naibrd_TTL_VerifyPatGenCtrl ( naibrd_ttl_pattern_ctrl_t controlBit )

static

◆ naibrd_TTL_VerifyPWMPolarity()

static nai_status_t naibrd_TTL_VerifyPWMPolarity ( naibrd_ttl_pwm_polarity_t polarity )

static

◆ naibrd_TTL_VerifyResetType()

static nai_status_t naibrd_TTL_VerifyResetType ( naibrd_ttl_reset_type_t type )

static

◆ naibrd_TTL_VerifyState()

static nai_status_t naibrd_TTL_VerifyState ( naibrd_ttl_state_t state )

static

◆ naibrd_TTL_VerifyStatusType()

static nai_status_t naibrd_TTL_VerifyStatusType ( naibrd_ttl_status_type_t type )

static

Variable Documentation

◆ ttl_24_interrupt_num

const int32_t ttl_24_interrupt_num[NAIBRD_TTL_STATUS_TYPE_ENUM_COUNT]

static

Initial value:

= {
   NAI_TTL_GEN5_REG_BIT_INT_VECTOR_STEERING_INTNUM,
   NAI_TTL_GEN5_REG_BIT_INT_VECTOR_STEERING_INTNUM,
   NAI_TTL_GEN5_REG_OVERCURRENT_INT_VECTOR_STEERING_INTNUM,
   NAI_TTL_GEN5_REG_OVERCURRENT_INT_VECTOR_STEERING_INTNUM,
   NAI_TTL_GEN5_REG_LO_HI_TRANS_INT_VECTOR_STEERING_INTNUM,
   NAI_TTL_GEN5_REG_LO_HI_TRANS_INT_VECTOR_STEERING_INTNUM,
   NAI_TTL_GEN5_REG_HI_LO_TRANS_INT_VECTOR_STEERING_INTNUM,
   NAI_TTL_GEN5_REG_HI_LO_TRANS_INT_VECTOR_STEERING_INTNUM,
   NAI_GEN5_SUMMARY_INTERRUPT_NUM,
   NAI_GEN5_SUMMARY_INTERRUPT_NUM,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_INT_VECTOR_STEERING_INTNUM,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_INT_VECTOR_STEERING_INTNUM,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_INT_VECTOR_STEERING_INTNUM,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_INT_VECTOR_STEERING_INTNUM
}

◆ ttl_24_reg_int_type

const uint32_t ttl_24_reg_int_type[NAIBRD_TTL_STATUS_TYPE_ENUM_COUNT]

static

Initial value:

= {
   NAI_TTL_GEN5_REG_BIT_EDGE_LEVEL_INT_ADD,
   NAI_TTL_GEN5_REG_BIT_EDGE_LEVEL_INT_ADD,
   NAI_TTL_GEN5_REG_OVERCURRENT_EDGE_LEVEL_INT_ADD,
   NAI_TTL_GEN5_REG_OVERCURRENT_EDGE_LEVEL_INT_ADD,
   NAI_TTL_GEN5_REG_LO_HI_TRANS_EDGE_LEVEL_INT_ADD,
   NAI_TTL_GEN5_REG_LO_HI_TRANS_EDGE_LEVEL_INT_ADD,
   NAI_TTL_GEN5_REG_HI_LO_TRANS_EDGE_LEVEL_INT_ADD,
   NAI_TTL_GEN5_REG_HI_LO_TRANS_EDGE_LEVEL_INT_ADD,
   NAI_GEN5_SUMMARY_INTERRUPT_EDGE_LEVEL_MODE_ADD,
   NAI_GEN5_SUMMARY_INTERRUPT_EDGE_LEVEL_MODE_ADD,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_EDGE_LEVEL_INT_ADD,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_EDGE_LEVEL_INT_ADD,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_EDGE_LEVEL_INT_ADD,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_EDGE_LEVEL_INT_ADD
}

◆ TTL_GEN3_DebounceTimeRegAddr

const uint32_t TTL_GEN3_DebounceTimeRegAddr[] = NAI_TTL_GEN3_REG_DEBOUNCE_TIME_ADD

static

◆ TTL_GEN3_IOFormatRegAddr

const uint32_t TTL_GEN3_IOFormatRegAddr[2] = NAI_TTL_GEN3_REG_INPUT_OUTPUT_FORMAT_ADD

static

◆ TTL_GEN3_StatusRegAddr

const uint32_t TTL_GEN3_StatusRegAddr[NAIBRD_TTL_STATUS_TYPE_ENUM_COUNT]

static

Initial value:

= {
   NAI_TTL_GEN3_REG_BIT_LATCHED_STATUS_ADD,
   0,
   NAI_TTL_GEN3_REG_OVERCURRENT_STATUS_ADD,
   0,
   NAI_TTL_GEN3_REG_LO_HI_TRANS_STATUS_ADD,
   0,
   NAI_TTL_GEN3_REG_HI_LO_TRANS_STATUS_ADD,
   0,
   0,
   0,
   0,
   0,
   0,
   0
}

◆ TTL_GEN5_CountDataRegAddr

const uint32_t TTL_GEN5_CountDataRegAddr[24] = NAI_TTL_GEN5_REG_COUNT_DATA_ADD

static

◆ TTL_GEN5_CountDataResetRegAddr

const uint32_t TTL_GEN5_CountDataResetRegAddr[1] = { NAI_TTL_GEN5_REG_RESET_TIMER_ADD }

static

◆ TTL_GEN5_DebounceTimeRegAddr

const uint32_t TTL_GEN5_DebounceTimeRegAddr[] = NAI_TTL_GEN5_REG_DEBOUNCE_TIME_ADD

static

◆ TTL_GEN5_EnhancedModeMappedVal

const uint32_t TTL_GEN5_EnhancedModeMappedVal[] = NAI_TTL_GEN5_MODE_MAPPED_VALUE

static

◆ TTL_GEN5_EnhancedModeSelectAddr

const uint32_t TTL_GEN5_EnhancedModeSelectAddr[24] = NAI_TTL_GEN5_REG_MODE_SELECT_ADD

static

◆ TTL_GEN5_FIFO_CountRegAddr

const uint32_t TTL_GEN5_FIFO_CountRegAddr[24] = NAI_TTL_GEN5_REG_COUNT_ADD

static

◆ TTL_GEN5_FIFO_DataRegAddr

const uint32_t TTL_GEN5_FIFO_DataRegAddr[24] = NAI_TTL_GEN5_REG_FIFO_DATA_ADD

static

◆ TTL_GEN5_FIFO_ResetRegAddr

const uint32_t TTL_GEN5_FIFO_ResetRegAddr[1] = { NAI_TTL_GEN5_REG_RESET_FIFO_ADD }

static

◆ TTL_GEN5_FIFO_StatusRegAddr

const uint32_t TTL_GEN5_FIFO_StatusRegAddr[24] = NAI_TTL_GEN5_REG_FIFO_STATUS_ADD

static

◆ TTL_GEN5_int_enable

const uint32_t TTL_GEN5_int_enable[NAIBRD_TTL_STATUS_TYPE_ENUM_COUNT]

static

Initial value:

= {
   NAI_TTL_GEN5_REG_BIT_INT_ENABLE_ADD,
   NAI_TTL_GEN5_REG_BIT_INT_ENABLE_ADD,
   NAI_TTL_GEN5_REG_OVERCURRENT_INT_ENABLE_ADD,
   NAI_TTL_GEN5_REG_OVERCURRENT_REALTIME_STATUS_ADD,
   NAI_TTL_GEN5_REG_LO_HI_TRANS_INT_ENABLE_ADD,
   NAI_TTL_GEN5_REG_LO_HI_TRANS_INT_ENABLE_ADD,
   NAI_TTL_GEN5_REG_HI_LO_TRANS_INT_ENABLE_ADD,
   NAI_TTL_GEN5_REG_HI_LO_TRANS_INT_ENABLE_ADD,
   NAI_GEN5_SUMMARY_INTERRUPT_ENABLE_ADD,
   NAI_GEN5_SUMMARY_INTERRUPT_ENABLE_ADD,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_STATUS_INT_ENABLE_ADD,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_STATUS_INT_ENABLE_ADD,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_STATUS_INT_ENABLE_ADD,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_STATUS_INT_ENABLE_ADD
}

◆ TTL_GEN5_LegacyModeSelectAddr

const uint32_t TTL_GEN5_LegacyModeSelectAddr[] = NAI_TTL_LEGACY_REG_MODE_SELECT_ADD

static

◆ TTL_GEN5_PWM_BurstCountRegAddr

const uint32_t TTL_GEN5_PWM_BurstCountRegAddr[24] = NAI_TTL_GEN5_REG_PWM_BURST_COUNT_ADD

static

◆ TTL_GEN5_PWM_PeriodRegAddr

const uint32_t TTL_GEN5_PWM_PeriodRegAddr[24] = NAI_TTL_GEN5_REG_PWM_PERIOD_ADD

static

◆ TTL_GEN5_PWM_PulseWidthRegAddr

const uint32_t TTL_GEN5_PWM_PulseWidthRegAddr[24] = NAI_TTL_GEN5_REG_PWM_PULSEWIDTH_ADD

static

◆ TTL_GEN5_PWMPolarityRegAddr

const uint32_t TTL_GEN5_PWMPolarityRegAddr[1] = { NAI_TTL_GEN5_PWM_POLARITY_SELECT_ADD }

static

◆ TTL_GEN5_StatusRegAddr

const uint32_t TTL_GEN5_StatusRegAddr[NAIBRD_TTL_STATUS_TYPE_ENUM_COUNT]

static

Initial value:

= {
   NAI_TTL_GEN5_REG_BIT_LATCHED_STATUS_ADD,
   NAI_TTL_GEN5_REG_BIT_REALTIME_STATUS_ADD,
   NAI_TTL_GEN5_REG_OVERCURRENT_LATCHED_STATUS_ADD,
   NAI_TTL_GEN5_REG_OVERCURRENT_REALTIME_STATUS_ADD,
   NAI_TTL_GEN5_REG_LO_HI_TRANS_LATCHED_STATUS_ADD,
   NAI_TTL_GEN5_REG_LO_HI_TRANS_REALTIME_STATUS_ADD,
   NAI_TTL_GEN5_REG_HI_LO_TRANS_LATCHED_STATUS_ADD,
   NAI_TTL_GEN5_REG_HI_LO_TRANS_REALTIME_STATUS_ADD,
   NAI_GEN5_SUMMARY_STATUS_LATCHED_ADD,
   NAI_GEN5_SUMMARY_STATUS_REAL_TIME_ADD,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_LATCHED_STATUS_ADD,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_REALTIME_STATUS_ADD,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_LATCHED_STATUS_ADD,
   NAI_TTL_GEN5_REG_WATCHDOG_TIMER_INTER_FPGA_FAULT_REALTIME_STATUS_ADD
}

◆ TTL_GEN5_TimebaseIntervalRegAddr

const uint32_t TTL_GEN5_TimebaseIntervalRegAddr[24] = NAI_TTL_GEN5_REG_TIMEBASE_INTERVAL_ADD

static

◆ TTL_GEN5_VCCReadingRegAddr

const uint32_t TTL_GEN5_VCCReadingRegAddr[4] = NAI_TTL_GEN5_REG_VCC_RDG_ADD

static

Functions

Variables

Function Documentation

◆ naibrd_TTL_VerifyAccesType()

◆ naibrd_TTL_VerifyBank()

◆ naibrd_TTL_VerifyBankVCCSource()

◆ naibrd_TTL_VerifyBurstNum()

◆ naibrd_TTL_VerifyChannel()

◆ naibrd_TTL_VerifyDataPattern()

◆ naibrd_TTL_VerifyEnableType()

◆ naibrd_TTL_VerifyEnhancedMode()

◆ naibrd_TTL_VerifyEventMapCategoryType()

◆ naibrd_TTL_VerifyFIFOEventMappedStatus()

◆ naibrd_TTL_VerifyInterruptSteeringType()

◆ naibrd_TTL_VerifyInterruptTriggerType()

◆ naibrd_TTL_VerifyIOFormat()

◆ naibrd_TTL_VerifyPatGenAdrress()

◆ naibrd_TTL_VerifyPatGenCtrl()

◆ naibrd_TTL_VerifyPWMPolarity()

◆ naibrd_TTL_VerifyResetType()

◆ naibrd_TTL_VerifyState()

◆ naibrd_TTL_VerifyStatusType()

Variable Documentation

◆ ttl_24_interrupt_num

◆ ttl_24_reg_int_type

◆ TTL_GEN3_DebounceTimeRegAddr

◆ TTL_GEN3_IOFormatRegAddr

◆ TTL_GEN3_StatusRegAddr

◆ TTL_GEN5_CountDataRegAddr

◆ TTL_GEN5_CountDataResetRegAddr

◆ TTL_GEN5_DebounceTimeRegAddr

◆ TTL_GEN5_EnhancedModeMappedVal

◆ TTL_GEN5_EnhancedModeSelectAddr

◆ TTL_GEN5_FIFO_CountRegAddr

◆ TTL_GEN5_FIFO_DataRegAddr

◆ TTL_GEN5_FIFO_ResetRegAddr

◆ TTL_GEN5_FIFO_StatusRegAddr

◆ TTL_GEN5_int_enable

◆ TTL_GEN5_LegacyModeSelectAddr

◆ TTL_GEN5_PWM_BurstCountRegAddr

◆ TTL_GEN5_PWM_PeriodRegAddr

◆ TTL_GEN5_PWM_PulseWidthRegAddr

◆ TTL_GEN5_PWMPolarityRegAddr

◆ TTL_GEN5_StatusRegAddr

◆ TTL_GEN5_TimebaseIntervalRegAddr

◆ TTL_GEN5_VCCReadingRegAddr